FET Configuration

Article : Andy Collinson
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FET Configurations
The field effect transistor (FET) has three terminals, gate, source and drain and can be used in three different configurations, each with one terminal common to both input and output signal. The difference between a FET and a BJT transistor is that the FET has a much higher input impedance, and the gate terminal is controlled with a voltage, (as opposed to base current in transistors). Like transistors, FET's come in two polarities, N-channel and P-channel. In addition FET's are available in two types, the junction FET or JFET and metal oxide silicon FET or MOSFET. The MOSFET is also available in single or dual gate version, and this variant is called a double gate MOSFET or DGMOSFET. The terminals for N-types FET's are shown below.
How a Field Effect Transistor Works
Without going into great detail, the FET is a block of semiconductor material with the drain and source at opposite ends. This current path flows from source to drain and is called a "channel". In Figure A (right) you can see the basic elements, where S is source terminal, D Drain terminal and G gate terminal.

With the N-channel FET, the drain is connected to the positive terminal and source negative. A P-channe; FET has the source and drain connected to the opposite terminals. With the N-channel FET, current flow through the channel (pale yellow in Fig. A) is by electron carriers. The gate is connected across the channel and controls the width of the channel.

When the gate terminal is reverse biased, areas through the channel are emptied of electron carriers. This region shown in Figure B in Orange is called a "depletion area". The depletion area reduces the width of the channel and current flow through the channel is reduced. Increasing the bias causes the depletion area to expand further reducing current flow .Eventually, a point is reached where the gate is so negative, that the channel is virtually closed and current is practically zero. This is known as the "pinch-off" region. The current through drain to source can therefore be controlled by adjusted the gate voltage. Because the gate to channel junction area is reverse biased, the gate current is extremely small, and input impedance very high.

The MOSFET has an insulated gate and its basic elements are shown in Figure C. The gate is insulated from the channel by an extremely thin dielectric material. This is different to the normal junction FET. The substrate is made from a P=type material and current flow through the junction is made by positive hole carriers. When the gate is made more negative, positive charges from the substrate move towards the gate, and the width of the channel and current flow is reduced. As the gate is insulated, the input impedance is extremely high and can be hundreds of mega ohms. Because of the extremely high input impedance the MOSFET can be easily damaged by static charge. Care must be taken to avoid touching the terminals, and for this reason MOSFET's usually come packages in conductive foam or bags.

Common Source Configuration

In common source configuration, the source terminal common to both the input and output signal. The arrangement is the same for a P-channel FET, except that the power supplies (not shown) will have the opposite polarity. Used in this way the FET has the advantages of the very high input impedance, medium output impedance, and the highest voltage and current gain and power gain of all configurations. The input and output signals phase is inverted and has 180° phase shift.

FET Transconductance
Compared to a bipolar junction transistor, the FET is voltage controlled and uses the voltage on the gate to control the current flowing though the drain-source region. This property is called transconductance, given the symbol gm and measured in milli-siemens.

Common Gate Configuration

In the common gate configuration, the gate terminal is common to both the input and output. This mode is mainly used in RF amplifiers. The common gate stagen provides a low input impedance and high output impedance. Although the voltage is high, the current gain is low and the overall power gain is also low compared to the other configurations. The input and output signals are in phase.

Source Follower Configuration

This source follower is also the common drain mode as the drain terminal is common to both input and output. The output signal at the drain follows the gate voltage and is in phase. This stage offers a high input impedance, low output impedance and it is widely used as a buffer. Voltage gain is unity, although current gain is high.

Useful Circuits
The following links are practical circuits employing FET's on Circuit Exchange International
VHF Amplifier Use 2 FET's in cascode mode
UHF Amplifier FET used in Common Gate as UHF Amp
Medium Wave Active Antenna DGMOSFET first stage used as an RF amplifier.
Static or Negative Ion Detector Utilising the very high gate input impedance to detect static/negative ions.

1 FET Amplifiers